GALSification of IEEE 802.11a Baseband Processor

In this paper a Globally Asynchronous Locally Synchronous (GALS) implementation of a complex digital system is discussed. The deployed asynchronous wrappers are based on a novel request-driven technique with embedded time-out function. Each GALS block is fitted with a local clock generator for flushing the internal pipeline stages when there are no incoming requests. This request-driven technique is applied for the ‘GALSification’ of an IEEE 802.11a compliant baseband processor. Details of the GALS partitioning and some additionally developed blocks will be discussed. Furthermore, the designflow, implementation results and power estimation numbers are reported.